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  Synopsys      Noida, Hyderabad, Bangalore      2 - 15 Years
Backend
Nitin Jain
Employee
250
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11
Quick Applied
( 11 Quick Applied )

Job Description

Designation/Team/Product
Location
Experience
Key Technical Skills Required
Sr Application Engineer
Hyderabad
3-7 years
Experience in PDK development, iPDK developement and validation. Strong understanding of ASIC design flow, VLSI, and/or CAD engineering. Knowledge of competitive EDA tool products and product knowledge in any of the areas of Simulation, Verification, Place and Route, Design Reuse and/or Physical Design is desired.
Applications Engineer , Sr II
Hyderabad
5-8 years
*Coursework in Computer Architecture (pipeline, caches, memory protection etc) *Working knowledge of the bus protocols AXI and AHB *Embedded systems programming, debugging and firmware design using Assembly and C *Prior experience in using IDEs (any one of Eclipse,Keil,IAR,CCS,CodeWarrior etc) with JTAG hardware for debugging *Experience in hardware development using Verilog for ASIC or FPGA, including RTL coding (Verilog/System Verilog), logic simulation and synthesis, timing analysis, and verification methodologies. *Strong problem solving ability and debug through verification capability
Applications Engineer, Sr II
Hyderabad
7+ years
Experience in synthesis and Static Timing Analysis(Design Compiler and ICC). Uses in-depth product knowledge to provide technical expertise to customer through presentations and product demonstrations. May create detailed design and implementation specifications for complex products/applications/systems.
Senior Applications Engineer
Hyderabad
3 - 6 years
1) PV - Experience in (IC-Validator) and Extraction (STAR-RC) or similar tools. Candidate should have a thorough knowledge in Digital circuits, CMOS concepts and ASIC design flow. Knowing STA & scripting  is an added advantage 2) PnR - Candidate should have a thorough knowledge in Digital circuits, CMOS concepts and ASIC design flow. Exp in ICC I , ICC2 . Knowing STA & scripting  is an added advantage
Design Consultant, Sr I
Bangalore
6-9 Years
Hands on experience doing Physical Design of complex blocks and/or FullChip designs. Should have good understanding of timing, power and area trade-offs. Ability to pick-up new flows, learn on the job and influence QOR is a must. Experience delivering designs with multiple voltage islands is a plus.
Design Consultant, Sr I
Bangalore
5 to 9 Years
Typically requires a minimum of 5 years of related experience. Possesses a solid understanding of specialization area plus working knowledge of one other related area. Resolves issues in creative ways. Exercises independent judgment in selecting methods and techniques to obtain solutions. Executes projects from start to completion. Contributes to moderately complex aspects of a project. Determines and develops recommendations to solutions. Works on team-driven or task-oriented projects. May guide more junior peers with aspects of their job. Networks with senior internal and external personnel in own area of expertise.
Applications Engineer, II
Bangalore
4 to 8 Years
BS in EE/CS with 4+ years of relevant experience, MS with 2+ years of relevant experience •Working knowledge needed for spice simulators (Hspice) and std cell characterization •Shell/TCL/Perl script language programming skill in Unix/Linux environment. •Excellent written and verbal English communication skills are necessary. •Software development and testing methodologies is a strong plus.
Applications Engineer II
Bangalore
2-5 years
Strong understanding of the ASIC design flow, VLSI, and/or CAD engineering Proficiency with IC Validator or similar tool such as Calibre, Assura, PVS or Quartz is preferable. Experience in foundry runset creation (for DRC/LVS/ERC/DFM), solving LVS issues, knowledge of foundry processes, or understanding advanced DFM requirements is highly desired.
Applications Engineer, Sr II
Bangalore
7+ years
Strong understanding of the ASIC design flow, VLSI, and/or CAD engineering Proficiency with IC Validator or similar tool such as Calibre, Assura, PVS or Quartz is preferable. Experience in foundry runset creation (for DRC/LVS/ERC/DFM), solving LVS issues, knowledge of foundry processes, or understanding advanced DFM requirements is highly desired.
Deputy Product Marketing Manager
Bangalore
8+ years
Be part of our Multi-protocol SerDes Marketing team with a specific focus on our Ethernet business. Work closely with the SerDes Marketing Team to define the overall product line strategy and positioning including the creation of internal and external collateral and execute it.
Responsibilities include: Definition and promotion of products that will result in sustainable growth within product line responsibilities. Creation of strategic and tactical marketing plans, Generation of marketing requirements documents, Creation of product roadmaps, New product rollouts, TAM/SAM analysis, Knowledge of PCIe and Ethernet protocols, Knowledge of data center market, Experience with strategic market analysis and product planning, Demonstrated marketing expertise in product positioning, value proposition articulation and creation of compelling collateral
Applications Engineer
Bangalore
2-5 years
ASIC design experience in all aspects of physical design, experience in the place & route domain (direct IC Compiler is preferred, or competing place and route tools), Knowledge of each step in the process of RTL to GDS II design flow, ARM Core implementation experience
Senior Technical Marketing Manager
Bangalore
8-12 years
The Technical Marketing Manager (TMM) for Embedded Memory will be the key technical interface between customers, Field Application Engineers and R&D for the Embedded Memory product line. Responsibilities include: Translate customer requirements into marketing requirements documents (MRD) and Product Review Documents (PRD) Definition of new products that will result in sustainable growth within the product line Competitive analysis of product line with respect to competition and customer requirements FAE communication and training Communicating technical benefits of product line to customers and understanding customer needs Promotion of product lines through articles, white papers, application notes and seminars
Regional Sales Manager
Bangalore
5-10 years
Possess a good understanding of software security and a working knowledge of multiple related areas - development environments, integration stacks, development life cycles, testing and quality assessment. This role is responsible for achieving growth and hitting quarterly and annual sales targets. Involves territory development planning. Will have to identify, qualify and develop opportunities to sell a breadth of portfolio products, services and solutions. Work closely with the product Sales Engineering team and services teams to meet customer needs, and achieve targets.
Design Consultant, Staff
Bangalore
8-12 years
Responsible for the development and implementation of technical solutions to customer problems as part of a project team. Uses Synopsys EDA tools on a customer project in at least one service line area which includes physical design, front-end implementation, verification, design for test and SoC design. Contributes to both off-site projects and be a trusted advisor to customer design teams. Discovers classical solutions to problems with little guidance and implements them independently. Sets task-level goals and consistently meets schedules. Works with Applications Consulting and Sales team to extend or expand customer contract.
Senior Staff Applications Engineer
Bangalore
12-15 years
ASIC design experience in all aspects of physical design, experience in the place & route domain (direct IC Compiler is preferred, or competing place and route tools), Knowledge of each step in the process of RTL to GDS II design flow, ARM Core implementation experience
Senior Sales Engineer
Bangalore
5+ years
Five years of software development experience in programming languages such as C/C++, Java, C# and Objective-C, and scripting languages such as JavaScript, Perl and Python Five years of experience in customer-interacting positions such as sales engineer, professional services consultant, technical support engineer or customer facing developer BS or MS in computer science, engineering, or related subjects Broad understanding of the Software Development Lifecycle as well as Agile & Continuous Integration/Continuous Delivery/Continuous Deployment approaches Good understanding of software quality and security testing methodologies and best practices Expertise in software application quality and security is a plus; official security certifications such as CEH and CISSP/CSSLP preferred
Application Engineer, Staff
Bangalore
5-8 years
The Design flow expert will be an expert in Synthesis. The flow specialist will work closely with our customers assisting them in performing high performance core design work.  They will also work closely with internal resources to develop implementation flows and improve Synopsys tools and flows.  To be successful in the role, the individual must also excel in non-technical skill areas including team work, project leadership, customer focus, and communication.   Educational/Experience Requirements: BSEE with 10+ experience in ASIC design experience in all aspects of  design implementation. Excellent verbal and written communication skills are required. Must possess at last five years of recent hands on experience in the Synthesis.
Applications Engineer
Bangalore
5-8 years
ASIC design experience in all aspects of physical design, experience in the place & route domain (direct IC Compiler is preferred, or competing place and route tools), Knowledge of each step in the process of RTL to GDS II design flow, ARM Core implementation experience
Applications Engineer, Sr I
Bangalore
5-8 years
Good knowledge of Synthesis methodologies, flows and understanding of timing, power and area trade-offs. Uses in-depth product knowledge to enable customers to successfully use Synopsys Synthesis Products (Design Compiler Family, Fusion Compiler) in their design. Provide technical expertise to customer through presentations and product demonstrations. Excellent verbal and written presentation/communication skills are mandatory. Ability to work with customers and PAE/R&D teams is important.
Application Engineer Sr II
Bangalore
5-8 years
ASIC design experience in all aspects of physical design, experience in the place & route domain (direct IC Compiler is preferred, or competing place and route tools), Knowledge of each step in the process of RTL to GDS II design flow, ARM Core implementation experience
Senior Application Engineer
Bangalore
5-8 years
ASIC design experience in all aspects of physical design, experience in the place & route domain (direct IC Compiler is preferred, or competing place and route tools), Knowledge of each step in the process of RTL to GDS II design flow, ARM Core implementation experience
Senior Applications Engineer
Bangalore
6+ years
As a Nanotime AE, you will be responsible for providing technical support to customers and be deeply involved in transistor level STA and/or characterization of IO, Custom  and memory macro cells. Transistor level STA/characterization, help in creating characterization flows, debug and analyze technical issues, lead technical benchmarks and engagements, writing customer requirement specifications, create, and conduct product trainings. Knowledge of Static Timing Analysis, Exposure to Custom Designs and/or Memory Designs, Experience on SPICE simulations/simulators, Library characterization knowledge, Excellent written and verbal communication skills
Sr. Applications Engineer
Bangalore
6+ years
ASIC design experience in all aspects of physical design, experience in the place & route domain (direct IC Compiler is preferred, or competing place and route tools), Knowledge of each step in the process of RTL to GDS II design flow, ARM Core implementation experience
Staff Application Engineer
Bangalore
10+ years
ASIC design experience in all aspects of physical design, experience in the place & route domain (direct IC Compiler is preferred, or competing place and route tools), Knowledge of each step in the process of RTL to GDS II design flow, ARM Core implementation experience
Mgr I, Applications Engineering
Bangalore
8-10 years
low power verification, Responsibilities include overall quality of Synopsys Low Power solution with Zebu , Working closely with customer to understand the requirements and with Zebu software RnD for the implementation of various new UPF features, Signing off Zebu software release quality for the LP component
Applications Engineer, Sr II
Bangalore
6-8 years
Should have at least 7 years of relevant experience in Extraction, STA, PnR etc, Experience with Synopsys, Cadence, or Mentor tools for Extraction/STA is essential. Experience on timing ECO closure or parasitics field solver is a plus.
Applications Engineer, Sr II
Bangalore
7 year+
Physical designer with 7+ years of EDA product development/deployment, full-flow benchmarking, design tapeout experience. Requires thorough knowledge of RTL2GDS flows and methodologies , Prior experience in ARM/High Speed CPU/GPU implementation
Applications Engineer, Sr II
Bangalore
7 years+
Responsible for Field Application Engineering Activities for static verification products, From a technical stand-point, understanding customer needs on static verification (CDC, Lint, Low Power), involve and work with their projects for using right methodologies and Synopsys tools for successful project completion
Applications Engineer, Sr II
Bangalore
7 years+
relevant work experience in Design implementation/ PnR flow, Experience with Synopsys, Cadence, or Mentor tools for PnR is essential. Expertise  in IC Compiler II PnR flow is a plus .
Applications Engineer, Sr II
Bangalore
7 years+
Relevant work experience in Logic Synthesis and verification.  Good knowledge of digital electronics concepts and familiarity with ASIC design flow, and/or VLSI design methodologies is required. Person must be conversant with UNIX. Experience with Synopsys, Cadence, or Mentor tools for logic  synthesis and equivalence checking is essential. Expertise  in simulation/VCS/VCLP flow is a plus .
Applications Engineer, Sr I
Bangalore
5 year+
5+ years of experience in Custom IC core applications such as circuit design, SDL, Analog Placement, Routing. LVS/DRC, Extraction and Analog/Digital Co-design is desired. Scripting skills (TCL, Perl, Python) required. Knowledge of competitive layout tools and industry standard EDA tools and methods for the design, implementation, and verification of Custom IC and Analog mixed-signal chips. Knowledge of the complete custom/mixed-signal design process and devices, experience with Open Access (OA), Custom & Analog layout design is a plus
Applications Engineer, II
Bangalore
2 years+
Typically requires a minimum of 2+ years of related experience. Possesses a solid understanding of Formal Functional  Verification plus working knowledge of coverage based verification. Resolves issues in creative ways. Exercises independent judgment in selecting methods and techniques to obtain solutions. Executes projects from start to completion.
Applications Engineer, Sr II
Bangalore
5-8 Years
Embedded memories and DFT/memory BIST experience. The successful candidate has an overall understanding of the design process. Is proficient with UNIX, HDL (Verilog/VHDL) and has a strong understanding of ASIC design flow and DFT/memory BIST. Knowledge of competitive IP products in the areas of memory compilers (SRAM/ROM/RF) and DFT/memory BIST is preferred. Ideal candidates will have a degree in Electrical Engineering. Experience with IC circuit design is preferred.STAR Memory System and Embedded Memories Product Support - Interface with customers, Synopsys AEs, and engineering staff to ensure a timely response to customer issues. Proactive Support of STAR Memory System and Embedded Memories,Support Tools - Interface directly with SolvNet and the Engineering Database to document and track resolutions to customer issues.
Applications Engineer, Sr I
Bangalore
4-8 Years
The team’s goal is to enable customers to successfully use Synopsys logic libraries in their design. Involved at different design stages (RTL to GDS) and tech nodes. Hands on experience in the place & route domain (direct IC Compiler, SOC Encounter, Innovus and AtopTech ).Knowledge of each step in the process of RTL to GDS II design flow with an emphasis on how it relates to all aspects of physical design.Product Support - Interface with customers, Synopsys AEs, and engineering staff to ensure a timely response to customer issues. Proactive Support - Write and maintain application notes, FAQ's, training materials, and other support material, providing customers easy access to application information.
Design Consultant, Staff
Bangalore
8-12 Years
SoC verification using system verilog test-benches. Test-bench development for sub-system and block level using system-verilog/verilog Test-bench based on ovm methodology. Functional coverage based verification closure.
Applications Engineer, Staff,Sr II
Bangalore
6-12 Years
Synopsys offers a broad portfolio of high-quality, silicon-proven IP solutions for the most widely used interfaces such as PCI Express, USB, DDR, SATA, HDMI, MIPI, and Ethernet. Responsible for technical support of customers using Synopsys DesignWare Cores IP. You will analyze and resolve complex IP usage issues and provide timely, accurate technical guidance to customers. Experience in ASIC/SoC front-end design including RTL coding in Verilog, logic and clock tree synthesis, static timing analysis, equivalence checking. Full understanding of digital design methodologies and tools including formal verification.
Application Engineer Sr I , Sr II
Bangalore
5+ years
Synopsys offers a broad portfolio of high-quality, silicon-proven IP solutions for the most widely used interfaces such as PCI Express, USB, DDR, SATA, HDMI, MIPI, and Ethernet. Responsible for technical support of customers using Synopsys DesignWare Cores IP. You will analyze and resolve complex IP usage issues and provide timely, accurate technical guidance to customers.Experience in ASIC/SoC front-end design including RTL coding in Verilog, logic and clock tree synthesis, static timing analysis, equivalence checking.Full understanding of digital design methodologies and tools including formal verification.
Senior Field Application Engineer (ASIC / IP)
Bangalore
8 years
Synopsys offers a broad portfolio of high-quality, silicon-proven IP solutions for the most widely used interfaces such as PCI Express, USB, DDR, SATA, HDMI, MIPI, and Ethernet. Responsible for technical support of customers using Synopsys DesignWare Cores IP. You will analyze and resolve complex IP usage issues and provide timely, accurate technical guidance to customers.Experience in ASIC/SoC front-end design including RTL coding in Verilog, logic and clock tree synthesis, static timing analysis, equivalence checking.Full understanding of digital design methodologies and tools including formal verification.
Physical Design- Application Engineer - Staff (ICC-II)
Noida
6-15 Years
ASIC design experience in all aspects of physical design, experience in the place & route domain (direct IC Compiler is preferred, or competing place and route tools), Knowledge of each step in the process of RTL to GDS II design flow, ARM Core implementation experience
Application Engineer - Sr I (DFT/Test)
Noida
4 - 8 Years
Experience with Design for Test methodologies, ATPG, ASIC/IC design experience, Strong interest and understanding of design methodologies, DFT, DFTMAX™
Application Engineer - Field
Noida
2+ years
Synopsys is the leading provider of Synthesis and Test solution in the market today. Design Compiler® is the RTL synthesis tool of choice for all leading IDMs. Formality® is the preferred formal verification solution for designs optimized by Design Compiler®. As a Front End Applications Engineer, you will have the opportunity to work closely with a leading multi-national IDM for the complete project cycle from RTL till netlist hand-off to Back-end and become an expert in DC & Formality products. You will have opportunities to learn the latest Synthesis & Logic Equivalence Checking methodologies.
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