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Openings in Modem Hardware Team @ Qualcomm Bangalore

  Qualcomm      Bengaluru      2 Years
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Job Description

Openings in Modem Hardware Team @  Qualcomm banglore
                   
2-18 years experience in the below areas
    Modem IP/Sub-system level Design
    Modem IP/Sub-system level verification
If JD matches to your profile then send me resume @ : Click to see email-id

ASIC Design Specialist/Architect (Wireless cellular Modem)
JD https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1955214   
QCT provides complete chipset solutions and integrated applications from the Launchpad suite of advanced technologies. Our integrated solutions offer device manufacturers reduced bill-of-materials costs, time-to-market, and development time. Mobile handsets powered by QCT chipsets can offer more features while maintaining a smaller, sleeker form-factor and benefiting from reduced power demands.
 
QCT values collaboration with its customers and partners and works closely with them to enable their success. We offer a wide range of tools to support the device development process, and develop new technologies based on the needs and demands of the wireless market. Devices for all market segments can now include features enabled by 3G/4G Cellular & Wireless technology, in demand by a growing and increasingly sophisticated wireless community.
QCT's Bangalore India team is in search of an experienced Wireless Modem Architects/Digital Designers to work on Qualcomm best in class chipsets and Modem cores
Roles and Responsibilites of Modem IP Core designers:
- You will be contributing to/ leading our Wireless Modem core for Physical layer RTL implementation of 2G/3G/4G Radio standard algorithms
- Digital design, Micro architecture and RTL coding in VHDL/Verilog
- High level design, Micro architecture of various blocks inside the transmit and receive chain
- Functional and Timing sign-off, hardware/IP delivery to sub-system team
- Working with Systems team for bit-exact models
- Assisting verification teams for bit-exact testing, debug through waveforms, compare with Golden C/Matlab system models
- High-level / Mid-Level / Low-level Design reviews. Writing and maintaining HDDs and SWI documentation
- Ability to understand CDMA200Radio formats, frame/slot/chip structure; Physical channels like: Pilot, RACH, SYNCH, Broadcast, Paging channels, Data channels, AICH, Control channels, OVSF spreading codes, Scrambling codes
- Prior experience with RTL implementation of one of these HW engines: Digital Filters [IIR/FIR/Equalization/Interpolation/Decimation filters], Rake engine, Equalization, Searcher, Channel estimation, Viterbi/Turbo decoder
- Run through all the ASIC Frontend implementation tools
 
Minimum of 2-18 years experience in Wireless Modem Design with a leading chipset company is a primary requirement
- Decent knowledge with any or one of these Radio standards: 3GPP [UMTS/LTE] , 3GPP2 standards [CDMA2000]
- Day-to-Day working experience with ASIC Frontend Tools & Implementation: Linting, Formal Logic equivalence, Logic synthesis, STA, CDC checks
- Strong fundamentals in one or few of these domain areas - Wireless and Mobile communications, Information theory, Coding theory, Signal processing
- Strong knowledge on fixed-point implementation Truncation/Rounding/Saturation concepts in mind
- Strong knowledge with Digital communication engines viz., Demodulators, Time track/Freq track loops, Deinterleavers, Equalizers, Viterbi/Turbo Decoders, Rake finger combining, Multi-path reception, Channel models [AWGN, Rayleigh, Rician fading], Sigma-Delta modulation, Base band filters implementation
- DSP: FFT, IFFT, Fourier / Z Tranforms implementation is highly desirable
- Control systems - Open/Closed loops, Stability criterion, Antenna theory will be an added advantage
- MIMO schemes: STC/Spatial multiplexing, Pre-coding techniques, Beam forming, Antenna Diversity techniques, Interference cancellation, Cross-cell combining techniques will be a big plus

 
ASIC Verification Specialist/Architect (Wireless cellular Modem)
https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1955215
Candidate must be able to take ownership of specific feature testing of IP Core(s). Analyze design and develop robust testing with proper coverage. Work with design team with regards to debug of RTL and to acquire guidance of how to test an IP block or module. Work and coordinate with other DV team members with regards to schedule and execution and request prompt support if needed.
Full understanding of DV at the IP and chip level
Effectively work with California based team members by working independently during India day time and communicating status and progress. This may require shifting hours in the short term to sync with CA PST day office hours.

2-18yrs of relevant ASIC verification experience required
Experience with System Verilog and high level DV languages
Experienced in OVM/UVM based DV environments
Knowledge of bus technologies such as AXI and AHB
Experience with Assertion based DV
Experience with version control methodology and ASIC front-end process
Experience with embedded C-code testing and verification
Experience with scripting for test automation
Understanding of coverage analysis and corner case test generation
Experience in power verification and gate-level testing
Good communication skills
Background in ASIC and digital design
ASIC Verification, system verilog, OVM/UVM, Native C-code
 
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