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NXP Hiring for SoC Low-Power Engineer (Entry Level)

  Nxp semiconductors      Bangalore      0 - 5 Years
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Job Description

NXP Hiring for SoC Low-Power Engineer (Entry Level)
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Exp -->  MTech Fresher - 5 Years With relevant experience / Internship Projects on UPF / CLP / Power Estimation / PrimePower / PowerArtist / PowerPro / RedHawk / Voltus
As a member of the SoC (System-on-Chip) Low-Power Methodology team, you work on a wide range of SoCs spanning different process technologies [40nm-5nm and below] and market segments [IoT, Industrial, Automotive, Networking, Radar] to produce the best-in-class combination of power, performance, and thermal behavior.

NXP designs a very wide range of SoC solutions from very cost-sensitive, low-power devices to highly integrated, high-performance devices with a worldwide network of design centers. You will be engaging with NXP's global design team in a highly visible position where strong verbal and written communication skills are a must.
 
Job Requirements
RTL / Netlist Power Estimation at IP and SOC level, using industry-standard EDA tools for power estimation
Hands-on experience in reporting dynamic/leakage power numbers, experience in checking clock gating efficiency, and power optimization techniques.
Ability to analyze power data and derive meaningful optimization opportunities from that data
Ability to develop UPF according to the Power Spec
Validation of UPF using Conformal Low Power tool at RTL and Gate Level
Working with  Verification, Subsystem, and SOC to close UPF-related issues
Hands-on experience in the development of UPF at block / SOC level having multiple power domains
Hands-on experience in UPF validation using the Conformal Low Power tool
Good understanding of low-power implementation flow
Proficient in scripting languages (Tcl and Perl).
Ability to communicate effectively with multiple global cross-functional teams

Key Challenges:
Analyse and identify the scope of power improvements at RTL / Synth / Implementation stage.
Generate high quality signoff power numbers to co-relate with silicon measurements
Create SOC and IP level power models for use case and system level power modelling
Deep dive into existing Ways of Working, identify bottlenecks, and creatively suggest improved Ways of Working
Job Qualification  
Bachelor's degree in Electrical Engineering or Computer Engineering.  
Preferred: Master's degree in Electrical Engineering or Computer Engineering.
Strong understanding of digital hardware design fundamentals, including device physics, circuit analysis, computer architecture, and memory usage at the circuit and system level
Verilog/SystemVerilog and industry-standard frontend and backend Tools
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