Job Description

Hiring Freshers | Physical IP Design Engineers 

We are looking for enthusiastic freshers from the following streams:
 ECE | EEE | Electronics & Instrumentation

 Role: Physical IP Design Engineer
(Full Custom Circuit Design – Memory, Standard Cell, I/O)

What we’re looking for:

Strong foundation in Digital Electronics

Solid understanding of CMOS fundamentals

High interest and passion for circuit design

Self-driven, motivated, and eager to learn

 Added Advantage:

Prior internship or training in PD / DV / Circuit Design

 Eligibility:

2025 freshers are welcome to apply

How to Apply:

Apply via the Below link (Google Sheet)

https://lnkd.in/ghU8rHKD

Please read the terms & conditions mentioned in the sheet carefully

Selection Process:

Offline test (dates will be communicated soon)
 
Physical IP / Circuit Design – Fresher Recruitment (Offline Test)
Terms & Conditions

• This opportunity is open only to candidates from ECE, EEE, and Electronics & Instrumentation.
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• Only 2025 pass-out freshers are eligible to apply.
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• Candidates must have a strong foundation in Digital Electronics and CMOS fundamentals.
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• The training duration will be 6 to 8 months.
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• The offered CTC will be ?4.0 – ?4.25 LPA after training.
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• Selected candidates must sign a 3.6-year service agreement with Exiger.
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• If a candidate leaves before completing the service agreement period, a bond amount of ?6,00,000 will apply.
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• The written test will be conducted offline during the 1st or 2nd week of January (exact date and venue will be communicated).
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• Shortlisting will be based on academic performance and offline test results.
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• Providing false information will result in immediate disqualification.
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• Filling this sheet does not guarantee selection.
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• Exiger reserves the right to modify or cancel the hiring process at any stage.