Job Description

We’re Hiring – RTL Design Engineers (Freshers)
We are looking for passionate and enthusiastic freshers to join our growing semiconductor design team and kickstart their careers in VLSI and Digital Design.
???? Role: RTL Design Engineer (Fresher)
???? Location: Chennai
???? Eligibility: 2025 & 2026 graduates in ECE / EEE / E&I

???? Role Summary
Work on RTL design and digital design activities, supporting IP development and verification under experienced engineering teams.

???? Key Responsibilities
• Assist in RTL design using Verilog/VHDL/SystemVerilog
• Support micro-architecture and design documentation
• Participate in simulation, debugging, and verification activities
• Learn and work on Lint, CDC, Synthesis, and DFT flows
• Collaborate with design and verification teams

???? Required Skills
• Basic understanding of Digital Electronics and VLSI concepts
• Knowledge of Verilog/VHDL/System Verilog
• Familiarity with protocols like SPI, I2C, UART, AMBA/AXI is a plus
• Understanding of RTL design flow and simulation concepts
• Good analytical and problem-solving skills
• Strong communication and willingness to learn

???? Preferred Knowledge
• Basics of ASIC/FPGA design flow
• Exposure to tools like ModelSim, Vivado, Cadence, or Synopsys tools
• Academic/project experience in digital design or embedded systems
???? Interested candidates can fill the form :
https://lnkd.in/ggq5V4-m